Multi-chip module having printed wiring board comprising circuit pattern for IC chip

ABSTRACT

Bare IC chips (201 through 203) are mounted on respective areas (101 through 103) of a printed wiring board (100). The outer electrode pads (105) on the peripheries of the board (100) are soldered to another printed wiring board (1) such as a mother board. Lead pads (107) and the outer electrode pads (105) are interconnected through a circuit pattern (109), through holes (111) and interstitial via holes (112). The circuit pattern (109) is disposed on a die bonding surface of the bare IC chips (201 and 202) for which insulation is not necessary. A multi-chip module is thus completed.

TECHNICAL FIELD

The present invention relates to a multi-chip module (MCM) in which aplurality of bare IC chips are mounted on a printed wiring board.

BACKGROUND ART

As the decrease in size and the enhancement in performance of electronicequipment are required, integrated circuits (ICs) mounted on a printedwiring board 1 as shown in FIG. 1 have been evolving from package-typeICs 2 to bare IC chips 3 shown in FIG. 2, and further to multi-chipmodules 5 as shown in FIG. 3.

In an arrangement shown in FIG. 2, bare IC chips 3 are mounted directlyon a printed wiring board 1 by means of die bonding and wire bonding.The areas of the printed wiring board required for mounting the bare ICchips are smaller as compared with a case in which package-type ICs 2covered with armoring material such as plastic or ceramics are mountedon the printing wiring board 1. However, if after mounting a lot of bareICs chips 3 on a printed wiring board 1, any of the bare ICs chips 3 isfound to be defective, the board 1 itself is scrapped because it isdifficult and troublesome to remove the defective bare IC chip from theboard 1 (to repair the board 1). In other words, there is a problem thatthe manufacturing process results in a poor yield.

A multi-chip module 5 which solves the above problem is shown in FIG. 3.Referring to FIG. 4 and 5, the manufacturing process of this multi-chipmodule 5 is briefly described. In the process, bare IC chips 52 arefixed by die bonding on a multilayer printed wiring board 51, and theelectrical connections are achieved by wire bonding. Each bare IC chipis fit with a dam frame, and sealed with resin. Then, lead terminals 55of the Gull Wing Type are soldered as outer electrodes to the electrodepads provided on the peripheral regions of the printed wiring board 51,thus completing the multi-chip module 5.

Since in case of multi-chip modules 5, each multi-chip module can betested alone in the operation, only the multi-chip modules 5 which havebeen passed the test can be mounted on a printed wiring board such as amother board (hereinafter, a printed wiring board on which multi-chipmodules are to be mounted is referred to as a "target printed wiringboard").

However, there are following problems in these conventional multi-chipmodules. First, a lot of lead terminals 55 have to be soldered to theperiphery of the printed wiring board 51. For this, the number ofworking processes increases, and the packaging density on a main printedwiring board 1 is reduced by the areas on the target printed wiringboard 1 which are occupied by the lead terminals 55.

In the second place, the size of the printed wiring board 51 becomeslarger as compared with the size of bare IC chips mounted on the printedwiring board 51 because a circuit pattern (not shown) for electricallyinterconnecting a plurality of bare IC chips 52 has to be providedaround the bare IC chips 52.

In the third place, in such an arrangement that each bare IC chip 52 isfit with a dam frame 53 for sealing with resin 57, large areas areoccupied by the dam frames 53 so attached as to enclose the respectivebare IC chips 52. This also causes the size of the printed wiring board51 to become large.

Also, the dam frames 53 are glued to the printed wiring board 51 byinserting projections 53a provided on each dam frame 53 into holes 51aof the printed wiring board 51 for positioning. Accordingly, the printedwiring board 51 is provided with a lot of positioning holes 51a, whichmake the circuit pattern complicated and cause the size of the printedwiring board 51 to become large.

Further, if sections of a multi-chip module 5 which have been enclosedby dam frames 53 are to be absorbed by a vacuum absorber 7 in mountingthe multi-chip module 5 on a main printed wiring board 1, enoughabsorption area can not be obtained because of the small size of eachdam frame 53. Thus, the absorbing and holding of multi-chip module isdifficult, and operations tend to be unstable.

In the fourth place, if resistors and capacitors for adjusting thecircuit are provided for a multi-chip module to form a compound module,then around the bare IC chips 52 there have to be extra areas where chipresistor elements, chip capacitor elements and electrode pads to whichthey are soldered are disposed. This also cause the size of the printedwiring board 51 to become large. And, since the chip elements have to besoldered after sealing the bare IC chips with resin, the number ofworking processes increase.

On the other hand, if the chip resistor and capacitor elements aremounted on the printed wiring board on which the multi-chip module 5 ismounted, the area for mounting the module 5 including the chip elementsincreases, causing the size of the target printed wiring board to becomelarge.

As described above, in conventional multi-chip module: the number ofattaching processes of the lead terminals; the size becomes larger inaccordance with the number of the lead terminals; the printed wiringboard increases in size because of a circuit pattern for interconnectingthe bare IC chips; the number of processes of attaching dam frames tothe bare IC chips; the attaching of dam frames causes the size of theprinted wiring board; it is difficult to vacuum-absorbing dam framesections for mounting the multi-chip module to the main printed wiringboard.

There is also another problem that if resistors and capacitors foradjusting the circuit are provided for a multi-chip module to form acompound module, then the size of the multi-chip module becomes large,thereby increasing the size of the printed wiring board on which themulti-chip module is mounted.

The present invention is intended for solving these and other problemsand disadvantages of the prior art. An object of the invention is toproviding a multi-chip module which can be made smaller than aconventional one, which can be manufactured in a reduced number ofprocess, and which can be easily mounted to a main printed wiring boardby means of vacuum absorption.

DISCLOSURE OF INVENTION

Solution

A multi-chip module according to a first aspect of the inventioncomprises a printed wiring board (100) and a plurality of bare IC chips(201 through 203), is mounted on a main printed wiring board (1), and ischaracterized by outer electrode pads (105) disposed along theperipheral portion of the printed wiring board, each having a geometryin which cutting a through hole longitudinally into halves results, theouter electrode pads being to be soldered to the target printed wiringboard.

A multi-chip module according to a second aspect of the inventioncomprises a printed wiring board (100) and a plurality of bare IC chips(201 through 203), is mounted on a main printed wiring board (1), and isso arranged that: a circuit pattern is provided on each of at least oneof the areas of the printed wiring board on which the plurality of bareIC chips are mounted; and an insulating layer is provided on each of thecircuit patterns.

A multi-chip module according to a third aspect of the invention is soarranged that: a circuit pattern is provided on each of at least one ofthe areas of the printed wiring board on which the plurality of bare ICchips are mounted; and an insulating layer is provided on each of thecircuit patterns.

A multi-chip module according to a fourth aspect of the inventioncomprises a printed wiring board (100) and a plurality of bare IC chips(201 through 203), is mounted on a target printed wiring board (1), andis so arranged that: at least one of a printed resistor element and aprinted dielectric is provided on each of at least one of the areas ofthe printed wiring board on which the plurality of bare IC chips aremounted; and an insulating layer is provided on each of the at least oneof the printed resistor element and the printed dielectric.

A multi-chip module according to a fifth aspect of the invention is soarranged that: at least one of a printed resistor element and a printeddielectric is provided on each of at least one of the areas of theprinted wiring board on which the plurality of bare IC chips aremounted; and an insulating layer is provided on each of the at least oneof the printed resistor element and the printed dielectric.

A multi-chip module according to a sixth aspect of the inventioncomprises a printed wiring board (100) and a plurality of bare IC chips(201 through 203) mounted on the printed wiring board, is to be mountedon a main printed wiring board (1), and is so arranged that: the printedwiring board has a multilayer structure; the printed wiring board isprovided with inner conductor layers within the multilayer structure andconnecting portions such as interstitial via holes leading from the bareIC chip mounting side to the inner conductor layers; and the bare ICchips are electrically interconnected via the interstitial via holes andthe inner conductor layers.

A multi-chip module according to a seventh aspect of the invention is soarranged that: the printed wiring board has a multilayer structure; theprinted wiring board being provided with inner conductor layers withinthe multilayer structure and interstitial via holes leading from thebare IC chip mounting side to the inner conductor layers; and the bareIC chips are electrically interconnected via the interstitial via holesand the inner conductor layers.

A multi-chip module according to an eighth aspect of the inventioncomprises a printed wiring board (100) and a plurality of bare IC chips(201 through 203), is mounted on a main printed wiring board (1), and isso arranged that: the printed wiring board has a multilayer structure;and within the multilayer structure, there are provided at least oneresistor element both the ends of which are electrically connected toinner conductor layers within the multilayer structure.

A multi-chip module according to a ninth aspect of the invention is soarranged that: the printed wiring board has a multilayer structure; andwithin the multilayer structure, there are provided at least oneresistor element both the ends of which are electrically connected toinner conductor layers within the multilayer structure.

A multi-chip module according to a tenth aspect of the inventioncomprises a printed wiring board (100) and a plurality of bare IC chips(201 through 203), is mounted on a main printed wiring board (1), and isso arranged that: the printed wiring board has a multilayer structure;and within the multilayer structure, there are provided at least onedielectric layer both the sides of which are electrically connected toinner conductor layers within the multilayer structure.

A multi-chip module according to an eleventh aspect of the invention isso arranged that: the printed wiring board has a multilayer structure;and within the multilayer structure, there are provided at least onedielectric layer both the sides of which are electrically connected toinner conductor layers within the multilayer structure.

A multi-chip module according to a twelfth aspect of the inventioncomprises a printed wiring board (100) and a plurality of bare IC chips(201 through 203), is mounted on a target printed wiring board (1), andis so arranged that: the printed wiring board has a multi layerstructure; and within the multi layer structure, there are provided atleast one resistor element both the ends of which are electricallyconnected to inner conductor layers within the multilayer structure andat least one dielectric layer both the sides of which are electricallyconnected to inner conductor layers within the multilayer structure.

A multi-chip module according to a thirteenth aspect of the invention isso arranged that: the printed wiring board has a multilayer structure;and within the multi layer structure, there are provided at least oneresistor element both the ends of which are electrically connected toinner conductor layers within the multilayer structure and at least onedielectric layer both the sides of which are electrically connected toinner conductor layers within the multilayer structure.

A multi-chip module according to a fourteenth aspect of the invention isso arranged that at least one of a printed resistor element and aprinted dielectric permitting trimming for adjustment is providedoutside the areas on the surface of the printed wiring board on whichthe plurality of bare IC chips are mounted.

A multi-chip module according to a fifteenth aspect of the inventioncomprises a printed wiring board (100) and a plurality of bare IC chips(201 through 203), is mounted on a main printed wiring board (1), and ischaracterized by a dam frame so provided on the printed wiring board asto enclose the plurality of bare IC chips, the inside of the dam framebeing filled with resin for sealing the bare IC chips.

A multi-chip module according to a sixteenth aspect of the invention ischaracterized by a dam frame so provided on the printed wiring board asto enclose the plurality of bare IC chips, the dam frame being filledwith resin for sealing the bare IC chips.

A multi-chip module according to a seventeenth aspect of the inventionis so arranged that the dam frame is provided with a reinforcing partrailing between two of the bare IC chips.

A multi-chip module according to an eighteenth aspect of the inventionis so arranged that chip electrode pads are disposed on the periphery ofthe bare IC chips on the bare IC chip mounting side of the printedwiring board, so that the boundary between the chip electrode pads andthe surrounding area of them serves as reference for positioning of thedam frame when the dam frame is mounted.

A multi-chip module according to a nineteenth aspect of the invention isso arranged that chip electrode pads are disposed on the periphery ofthe bare IC chips on the bare IC chip mounting side of the printedwiring board, and a solder resist is provided adjacent to the chipelectrode pads, so that the boundary between the chip electrode pads andthe solder resist serves as reference for positioning of the dam framewhen the dam frame is mounted.

A multi-chip module according to a twentieth aspect of the invention isso arranged that the dam frame is filled with resin for sealing the bareIC chips so that the surface of the resin is not higher than the upperface of the dam frame.

A multi-chip module according to a twenty-first aspect of the inventionis so arranged that the bare IC chips are mounted on the printed wiringboard by means of flip chip bonding.

A multi-chip module according to a twenty-second aspect of the inventioncomprises a printed wiring board (100) and a plurality of bare IC chips(201 through 203), is mounted on a main printed wiring board (1), and ischaracterized by through holes provided on the margin of the printedwiring board as outer electrode pads which are to be soldered to themother board.

A multi-chip module according to a twenty-third aspect of the inventioncomprises a printed wiring board (100) and a plurality of bare IC chips(201 through 203), is mounted on a main printed wiring board (1), and ischaracterized by outer electrode pads which are to be soldered to themother board, each pad extending from a point on the margin of theprinted wiring board and across the end face of the printed wiringboard.

A multi-chip module according to a twenty-fourth aspect of the inventionis so arranged that the outer electrode pads are soldered to lands ofthe main printed wiring board with the multi-chip module face to facewith or perpendicular to the main printed wiring board.

A multi-chip module according to a twenty-fifth aspect of the inventionis so arranged that after mounting the bare IC chips within the damframe and sealing the bare IC chips by filling the dam frame with resin,other bare IC chips are disposed on the dam frame and the resin.

A multi-chip module according to a twenty-sixth aspect of the inventionis so arranged that: the printed wiring board is provided with throughholes or concavities in which the bare IC chips are disposed; and thebare IC chips are disposed in the through holes or concavities andconnected by means of wire bonding.

A multi-chip module according to a twenty-seventh aspect of theinvention is so arranged that the main printed wiring board is providedwith a through hole; the multi-chip module is disposed in the throughhole; and the external electrode pads of the multi-chip module aresoldered to lands of the main printed wiring board.

A multi-chip module according to a twenty-eighth aspect of the inventionis so arranged that the bare IC chips are directly connected to theouter electrode pads by means of wire bonding.

A multi-chip module according to a twenty-ninth aspect of the inventionis so arranged that a printed conductor which serves as an inductancefor processing a high frequency signal is formed together with the atleast one of a printed resistor element and a printed dielectric.

A multi-chip module according to a thirtieth aspect of the invention isso arranged that a flexible printed wiring board is used as a mainprinted wiring board on which the multi-chip module is mounted.

A multi-chip module according to a thirty-first aspect of the inventionis so arranged that a dam frame is formed of a metal member and the bareIC chips are sealed with heat conductive resin so as to facilitate heatradiation from the bare IC chips.

A multi-chip module according to a thirty-second aspect of the inventionis so arranged that a dam frame is formed of a metal member in such ashape that the top of the dam frame is extend to cover the bare ICchips, and the bare IC chips are sealed with heat conductive resin so asto facilitate heat radiation from the bare IC chips.

A multi-chip module according to a thirty-third aspect of the inventionis characterized by a conductive cover for shielding the bare IC chipsdisposed on the printed wiring board from electromagnetic field.

A multi-chip module according to a thirty-fourth aspect of the inventionis further characterized by a conductive cover for shielding themulti-chip module disposed on the main printed wiring board fromelectromagnetic field.

A multi-chip module according to a thirty-fifth aspect of the inventionis characterized in that the printed wiring board of the multilayerstructure is formed of ceramic material, glass epoxy material, and/orresin material.

Advantageous Effects

In a multi-chip module according to any of the 1st, 5th, 7th, 9th, 11th,12th, 16th, 22nd, 23rd and 28th aspects of the invention, the geometryof each outer electrode pad which cutting a through hole in thelongitudinal direction yields for soldering the multi-chip module to themain printed wiring board, outer electrode pads each comprising athrough hole provided on the margin, outer electrode pads extending fromthe margin and across the end face, or the direct connection between thebare IC chips and the outer electrode pads by means of wire bondingeliminates the need of providing the margin of the printed wiring boardwith lead terminals as is done in conventional multi-chip modules.

In a multi-chip module according to any of the 2nd, 5th, 7th, 9th, 11th,12th and 16th aspects of the invention, a circuit pattern is disposed inareas on the printed wiring board where bare IC chips are mounted,resulting in a reduction of the circuit pattern which is to be providedaround the bare IC chips.

In a multi-chip module according to any of the 3rd, 5th, 7th, 9th, 11th,12th and 16th aspects of the invention, the circuit pattern which is tobe provided around the bare IC chips is reduced because there is no needfor providing the lead terminals as in the multi-chip modules of the 1stor 2nd aspect of the invention.

In a multi-chip module according to any of the 4th, 5th, 7th, 9th, 11th,12th, 16th and 29th aspects of the invention, there is no need forproviding chip resistor elements, chip capacitors or inductors aroundthe bare IC chips because resistor elements, capacitors and inductorscan be formed on the areas, on the printed wiring board, where the bareIC chips are mounted.

In a multi-chip module according to any of the 6th, 7th, 9th, 11th,12th, 16th and 35th aspects of the invention, the bare IC chips areelectrically interconnected via interstitial via holes and innerconductor layers provided within a multilayer structure formed ofceramic material, glass epoxy material, and/or resin material.Accordingly, the circuit pattern which has to be provided around thebare IC chips is reduced.

In a multi-chip module according to any of the 8th, 9th and 16th aspectsof the invention, since resistor elements can be formed within theprinted wiring board, there is no need for providing chip resistorelements on the surface of the printed wiring board.

In a multi-chip module according to any of the 10th, 11th and 16thaspects of the invention, since capacitors can be formed within theprinted wiring board, there is no need for providing chip capacitors onthe surface of the printed wiring board.

In a multi-chip module according to any of the 12th, 13th and 16thaspects of the invention, since resistor elements, capacitors, andinductors are formed within the printed wiring board, there is no needfor providing chip resistor elements, chip capacitors, and inductors onthe surface of the printed wiring board.

In a multi-chip module according to any of the 14th, 16th and 29thaspects of the invention, there is provided printed resistor elements,printed dielectrics and printed inductors, which has effects of not onlyany of the 1st through 13th aspects of the invention but also permittinga fine adjustment of operational characteristics of the circuit byremoving a part of the printed resistor elements, the printeddielectrics and the printed inductors.

In a multi-chip module according to any of the 15th, 16th and 25thaspects of the invention, since a single dam frame encloses a pluralityof bare IC chips, there is no need for providing each bare IC chip witha dam frame.

A multi-chip module according to the 17th aspect of the invention hasnot only the effect of 15th or 16th aspect of the invention but also theeffect of reducing a strain caused by heat at the time of resin sealingand reflow soldering because the dam frame is provided with areinforcing part.

Since in a multi-chip module according to the 18th aspect of theinvention the dam frame is mounted on the printed wiring board beingpositioned on the basis of the boundary between the electrode pads andthe surrounding area, there is no need for providing the printed wiringboard with holes in which the dam frames are mounted, as in case of the15th through 17th aspects of the invention.

In a multi-chip module according to the 19th aspect of the invention,the boundary between the electrode pads (e.g., golden color) and solderresist (e.g., green) provided adjacently to the electrode pads forpreventing the solder from bridging electrode pads is used as areference position for dam frame mounting. The color difference makesthe boundary more clear.

In a multi-chip module according to the 20th aspect of the invention,since the surface of the resin filling the dam frame enclosing aplurality of bare IC chips is not higher than the dam frame, the areaenclosed by the dam frame can be easily absorbed by a vacuum absorber.

In a multi-chip module according to the 21st aspect of the invention,since the bare IC chips are mounted on the printed wiring board by meansof flip chip bonding, there is no need for disposing bonding pads aroundthe bare IC chips on the surface of the printed wiring board.

In a multi-chip module according to the 24th aspect of the invention,there is a degree of freedom of the way of mounting the multi-chipmodule in that the multi-chip module may be disposed in parallel orperpendicular to a main printed wiring board.

In a multi-chip module according to the 25th aspect of the invention,after mounting the bare IC chips within the dam frame and sealing thebare IC chips by filling the dam frame with resin, other bare IC chipsare disposed on the dam frame and the resin. Accordingly, a largernumber of bare IC chips can be disposed on the multi-chip module.

In a multi-chip module according to the 26th or 27th aspect of theinvention, the bare IC chips are disposed in holes or concavities of amain printed wiring board and connected to the board by means of wirebonding, or the multi-chip module is inserted in a hole of a mainprinted wiring board. Therefore, the total thickness is kept thin.

In a multi-chip module according to the 30th aspect of the invention,the multi-chip module is disposed on a flexible wiring board, whichenables three-dimensional disposition.

In a multi-chip module according to the 31th or 32th aspect of theinvention, the sealing is achieved with a metal dam frame andheat-conductive resin, and accordingly the heat radiation from the bareIC chips is ensured.

In a multi-chip module according to the 33th or 34th aspect of theinvention, the bare IC chips or the multi-chip module are covered with aconductive cover preventing electrodes from being short-circuited, andare shielded from electromagnetic field.

BRIEF DESCRIPTION OF DRAWINGS

The above and other objects and aspects of the present invention will beapparent from the following description of the preferred embodiments ofthe invention with reference to the accompanying drawings. It is to beexpressly understood, however, that the embodiments shown in thedrawings are for the purpose of illustration and better understandingonly and are not intended as definitions of the limits of the invention.In the drawings:

FIG. 1 is a plan view of a printed wiring board on which conventionalICs of the package type are mounted;

FIG. 2 is a perspective view of a printed wiring board on whichconventional bare IC chips are mounted;

FIG. 3 is a perspective view of a conventional multi-chip module;

FIG. 4 is an enlarged view of a relevant part of a dam frame and aprinted wiring board of the multi-chip module shown in FIG. 1;

FIG. 5 is a diagram showing a manufacturing process of the multi-chipmodule shown in FIG. 1;

FIG. 6 is a section view showing how multi-chip modules shown in FIG. 1are mounted;

FIG. 7 is an exploded perspective view of a multi-chip module of a firstillustrative embodiment of the invention;

FIG. 8 is a perspective view showing an assembled state of themulti-chip module shown in FIG. 7;

FIG. 9 is a perspective view showing how the multi-chip module of FIG. 8is mounted on a main printed wiring board;

FIG. 10 is a section view of a relevant part of the multi-chip module ofFIG. 8;

FIG. 11 is a perspective view of a multi-chip module of a secondillustrative embodiment of the invention;

FIG. 12 is a perspective view of the printed wiring board of themulti-chip module of FIG. 11;

FIG. 13 is a perspective view showing the reverse side of the printedwiring board shown in FIG. 12;

FIG. 14 is a top view of the printed wiring board of FIG. 12;

FIG. 15 is a perspective view of the dam frame of the multi-chip moduleof FIG. 11;

FIG. 16 is a perspective view of a printed wiring board with a damframe;

FIG. 17 is a perspective view showing a state in which bare IC chips aremounted on the printed wiring board with a dam frame;

FIG. 18 is a diagram showing a manufacturing process of the printedwiring board with a dam frame;

FIG. 19 is a diagram showing a process of mounting bare IC chips;

FIG. 20 is a section view showing how the multi-chip module of FIG. 17is mounted;

FIG. 21 is a perspective view showing, as partially cut off, a printedwiring board of a multi-chip module in a third illustrative embodimentof the invention;

FIG. 22 is an enlarged view of a relevant part of the printed wiringboard of FIG. 21;

FIG. 23 is an enlarged view of another relevant part of the printedwiring board of FIG. 21;

FIG. 24 is an exploded perspective view of a multi-chip module of afourth illustrative embodiment of the invention;

FIG. 25 is a perspective view of an assembled state of the multi-chipmodule of FIG. 24;

FIG. 26 is a perspective view of a state in which the multi-chip modulesof FIG. 25 are mounted on a main printed wiring board;

FIG. 27 is a perspective view of an exemplary modification of outerelectrode pads;

FIG. 28 is a section view showing a state in which a multi-chip modulesaccording to the exemplary modification are mounted on a main printedwiring board;

FIG. 29 is a section view showing another modification of theembodiment, that is, another state in which a multi-chip modules ismounted on a main printed wiring board;

FIG. 30 is a perspective view of a state in which a multi-chip modulesis mounted on a flexible wiring board;

FIG. 31 is a perspective view showing an exemplary modification in whicha bare IC chip is magnetically shielded by covering the bare IC chipwith a conductive covering member;

FIG. 32 is a perspective view showing another exemplary modification inwhich the entire multi-chip module is magnetically shielded by coveringthe module with a conductive covering member.

BEST MODE FOR CARRYING OUT THE INVENTION

Referring to FIGS. 7 through 26, a multi-chip module according to apreferred embodiment of the invention will be described.

FIG. 7 is an exploded perspective view of a multi-chip module of a firstillustrative embodiment of the invention. FIG. 8 is a perspective viewof the first embodiment. FIG. 9 is a perspective view of a multi-chipmodule mounted on a main printed wiring board, and FIG. 10 is a sectionview of a relevant part of the multi-chip module of FIG. 8.

In FIGS. 7 and 8, the multi-chip module 5A of the first embodimentcomprises a multi-layer printed wiring board 100 formed of, for example,ceramic material, glass epoxy material, resin material or a combinationthereof, and three kinds of bare IC chips 201 through 203 mounted on theprinted wiring board 100. The bare IC chips 201 through 203 is mountedrespectively on the areas 101 through 103 shown in chain single-dottedlines on the surface of the printed wiring board 100.

On the edge of the printed wiring board 100, there are provided a lot ofouter electrode pads 105 which are to be soldered to main printed wiringboard 1 such as a mother board shown in FIG. 9. Each of the outerelectrode pads 105 has a geometry in which cutting a so-called platedthrough hole into halves (in the longitudinal direction) results, andhas a conductor layer part 105a and the other conductor layer part 105bprovided around the conductor layer part 105a. Also, on the surface ofthe printed wiring board 100, there are disposed a lot of wire-bondinglead pads 107 so as to surround each of the areas 101 through 103.

The lead pads 107 and the outer electrode pads are interconnected via acircuit pattern 109 provided on the surface of a printed wiring board100, and plated through holes 111 and interstitial via holes 112 formedin the printed wiring board 100.

In this case, the circuit pattern 109 on the surface of the printedwiring board 100 and conductor layers of inner layer 116 areinterconnected by means of interstitial via holes 112 as shown in FIG.10. Therefore, the quantity of the circuit pattern 109 which has to bedisposed on the surface of the printed wiring board 100 can be reduced.Further, since the interstitial via holes 112 do not extend to thereverse side of the printed wiring board 100, when the multi-chip module5A has been mounted on the target printed wiring board 1 in a laterprocess, there is no possibility of a short circuit between theinterstitial via holes 112 and the conductors of the main printed wiringboard 1.

The circuit pattern 109 on the surface of the printed wiring board 100is provided also on the inside of the areas 101 and 102, and these areas101 and 102 are provided with solder resist (an insulating layer) 115,as the other parts of the circuit pattern 109 are. Conventionally, inthe surface mounting of bare IC chips, an island is formed of aconductor layer on the printed wiring board as shown in the area 103,and a bare IC chip is mounted on the island by means of die bonding.However, in the first embodiment, the circuit pattern 109 is providedalso in areas under bare IC chips 201 and 202 which do not necessarilyrequire the earth potential of the printed wiring board 100 side.

By doing this, the quantity of the circuit pattern which has to bedisposed around the bare IC chips 201 through 203 is reduced. Thus, themounting area of the printed wiring board 100 and accordingly the sizeof the multi-chip module are reduced.

To the areas 101 through 103 of the printed wiring board 100, there isapplied silver paste, on which the bare IC chips 201 through 203 aredie-bonded. Then, as shown in FIG. 8, the electrode pads 205 of the bareIC chips 201 through 203 are bonded to the lead pads 107 of the printedwiring board 100 by wires 208, thereby completing a multi-chip module 5A

After putting the completed multi-chip module 5A to a functional test byusing the outer electrode pads 105, only the successfully testedmulti-chip modules 5A can be mounted on the main printed wiring board 1as shown in FIG. 9. In the surface mounting of the multi-chip module,the outer electrode pads 105 formed on the edge of the printed wiringboard 100 are soldered to the main printed wiring board 1. Therefore,this means that space equivalent to only the areas of the printed wiringboards 100 has to be secured on the main printed wiring board 1 as thearea necessary for mounting the multi-chip modules.

A second illustrative embodiment of the invention will be described inthe following.

FIG. 11 is a perspective view of the second illustrative embodiment,FIG. 12 is a perspective view of the printed wiring board, FIG. 13 is aperspective view showing the reverse side of the printed wiring board,FIG. 14 is a top view of the printed wiring board, FIG. 15 is aperspective view of the dam frame, FIG. 16 is a perspective view of aprinted wiring board with a dam frame, FIG. 17 is a perspective viewshowing a state in which bare IC chips are mounted on the printed wiringboard with a dam frame, FIG. 18 is a diagram showing a manufacturingprocess of the printed wiring board with a dam frame, FIG. 19 is adiagram showing a process of mounting bare IC chips, FIG. 20 is asection view showing how a multi-chip module is mounted.

A multi-chip module 5B according to the second embodiment of theinvention comprises a multilayer printed wiring board 100A, three kindsof bare IC chips 201 through 203 mounted on the board 100A, and resinsealing dam frame 220 so disposed on the printed wiring board 100A as toenclose the bare IC chips 201 through 203 as shown in FIG. 11 and 17.The dam frame 220 is filled with resin 230 for sealing the bare IC chips201 through 203. The structure of the printed wiring board 100A is thesame as that of the printed wiring board 100 in the first illustrativeembodiment.

On the edge of the printed wiring board 100A, there are provided a lotof outer electrode pads 105 each of which has a geometry in whichcutting a through hole into halves in the longitudinal directionresults. Also, on the surface of the printed wiring board 100A, thereare disposed a lot of wire-bonding lead pads 107 so as to surround eachof the mounting areas 101 through 103 for the bare IC chips 201 through203.

The lead pads 107 and the outer electrode pads 105 are interconnectedvia a circuit pattern provided on the surface of a printed wiring board100A, through holes and interstitial via holes formed in the printedwiring board 100A, and conductor layers provided on inner layers of theprinted wiring board 100A. Further, a circuit pattern is disposed alsoin areas 101 and 102 of the printed wiring board 100A, and area 103 isan island formed of a conductor layer. On each side of the printedwiring board 100A. there is formed a solder resist pattern 115 as aninsulating layer so as to cover all over except the outer electrode pads105, the lead pads 107, and the area 103. In order to prevent solderfrom bridging outer electrode pads 105, the solder resist pattern 115 isformed also between the outer electrode pads 105.

As shown in FIGS. 15 through 17, the dam frame 220 for resin sealing hasa rectangular shape of such a size as to be able to enclose all the bareIC chips 201 through 203 and is provided with a reinforcing part 221 soas not to cause a heat strain to occur to the printed wiring board 100Aat the time of resin sealing and reflow soldering. That is, the dameframe 220 is divided into two by the reinforcing part 221.

Referring to FIGS. 18 and 19, we explain a process of attaching a damframe 220 to the printed wiring board 100A and a process of mounting abare IC chip in the following.

In a dam frame attaching process as shown in FIG. 18, glue is firstapplied to predetermined positions of the printed wiring board 100A, andthe attaching to the glue-applied positions is achieved by using anautomatic machine. The glue applying to the predetermined position isachieved on the basis of the peripheral portion between the two outerelectrode pads (golden color) 105 located at positions on a diagonal ofthe printed wiring board 100A and solder resist (green) 115 partsadjacent to the two outer electrode pads 105 by identifying the colordifference between the pads 105 and the solder resist parts 115 with anoptical reader.

In this case, the outer electrode pads 105 is plated with gold, and thesolder resist 115 has a color (e.g., green) easier to recognize thanthat (usually semitransparency) of the board of the printed wiring board100A, so that the two borders can be accurately identified with anoptical reader.

Next, a dam frame 220 is placed on the predetermined position to whichglue has been applied on the basis of the two borders, the applied glueis hardened. Thus, the dam frame 220 is fixed to the printed wiringboard 100A.

As described above, in a multi-chip module of the second embodiment, thepositioning of dam frame 220 is achieved on the basis of the peripheralportion between the outer electrode pads 105 and the solder resist 115by optically identifying the peripheral portion by the color difference.Therefore, the manufacturing process is simplified because there is noneed for positioning and forming conventional positioning holes on theprinted wiring board 100A.

As shown in FIG. 19, a process of mounting the bare IC chips comprisesthe steps of: first applying silver paste to the areas 101 through 103of the printed wiring board 100A with a dam frame; die bonding the bareIC chips 201 through 203; hardening; wire bonding the electrode pads ofthe bare IC chips 201 through 203 and the lead pads 107 of the printedwiring board 100A by wires 208 (FIG. 17); sealing the bare IC chips 201through 203 by filling the dam frame 220 with resin 230 (FIG. 11); andthen making function tests.

In a multi-chip module 5B of the second embodiment, there is adopted aprocess of mounting the multi-chip module on the main printed wiringboard 1 by absorbing the part enclosed by the dam frame 220 by using avacuum absorber 7. In this case, the dam frame has a such a large sizeas to enclose the three bare IC chips 201 through 203, permitting anenough absorbing area to be secured. Also, the dam frame 220 is filledwith resin 230 in such a way that the surface of the resin 220 is keptflat to a predetermined extent within a height not higher than the topof the dam frame. Therefore, the multi-chip module 5B is easily absorbedwith an absorber 7.

Since the second embodiment is provided with a dam frame 220 and the damframe 220 is filled with resin 230 for sealing the chips 201 through203, other bare IC chips 201 through 203 can be disposed on the dameframe 220 and the resin 230. By doing this, the additional bare IC chipsenable a wider variety of arrangement of a multi-chip module.

Further, it is possible to promote heat radiation from the bare IC chips201 through 203 by forming the dam frame 220 of a metal member and usingresin with a high heat conductivity. This enables the bare IC chip toeffectively radiate heat which generates when the bare IC chips 201through 203 perform, for example, power amplification. If the dam frame220 is extended to resin 230 to enlarge the area of the dam frame 220,the heat radiation area becomes large, resulting in a more efficientheat radiation.

A third illustrative embodiment of the invention will be described inthe following.

FIG. 21 is a partially-cut-off perspective view of a printed wiringboard in the third illustrative embodiment of the invention; FIG. 22 isa section view showing a part including a resistor element of theprinted wiring board of FIG. 21; and FIG. 23 is a section view of a partincluding a capacitor of the printed wiring board of FIG. 21.

A multi-chip module according to the third embodiment of the inventionis obtained by providing a multi-chip module 5A or 5B of the first orsecond embodiment with built-in resistors and capacitors for signalcoordination with other multi-chip modules which are mounted on the samemain printed wiring board 1. For this purpose, a printed wiring board100B has a multilayer structure comprising component boards 118 formedof ceramic material, glass epoxy material, resin material, etc.

On the edge of the printed wiring board 100B of the third embodiment,there are again provided a lot of outer electrode pads 105 each of whichhas a geometry in which cutting a through hole into halves in thelongitudinal direction results as shown in FIG. 21. Also, on the surfaceof the printed wiring board 100B, there are disposed a lot of lead pads107 so as to surround each of the mounting areas for the bare IC chips201 through 203. The lead pads 107 and the outer electrode pads 105 areinterconnected via a circuit pattern provided on the surface of aprinted wiring board 100B, through holes 111 and interstitial via holes112 formed in the printed wiring board 100B, and conductor layers 119provided on inner layers of the printed wiring board 100B.

Further, resistor elements 121 and capacitors 122 are formed in theinside of the printed wiring board 100B. Each resistor element 121 isrealized by forming a resistor element (resistor layer) 124 on acomponent board 118 by means of, e.g., screen printing, and connectingboth ends of the resistor element to conductor layers 119 constituting ainner layer as shown in FIG. 22. Each capacitor 122 is formed byprinting a dielectric layer 126 on one conductor layer 119, andlaminating another component layer 118 so as to put the dielectric 126layer between the one conductor layer 119 and the other conductor layer119 on the another component layer 118 as shown in FIG. 23. It is notedthat the conductor layer 119 connected to these resistor elements orcapacitors 122 are connected to lead pads 107 and outer electrode pads105 via interstitial via hole 112, the circuit pattern 109, etc. Also,Ag-Pd paste, Rh-oxcide paste, etc. are used for the resistor elements124, and barium titanate-crystallized glass etc. is used for dielectriclayer 126.

Thus, in the third embodiment, resistor elements 121 and capacitors 122are disposed within the printed wiring board 100B. Resistor elements andcapacitors can be built in a multi-chip module without increasing thesize of the multi-chip module.

A fourth illustrative embodiment of the invention will be described inthe following.

FIG. 24 is an exploded perspective view of a multi-chip module of afourth illustrative embodiment of the invention; FIG. 25 is aperspective view of the multi-chip module of FIG. 24; and FIG. 26 is aperspective view of a state in which the multi-chip modules of FIG. 25are mounted on the main printed wiring board.

A multi-chip module 5D of the fourth embodiment is obtained by mountinga plurality of bare IC chips on the surface of a printed wiring board bymeans of flip chip bonding.

The multi-chip module 5D comprises a multilayer printed wiring board100D and three kinds of bare IC chips 201D through 203D which aremounted on the board 100D. The bare IC chips 201D through 203D aremounted on areas 101D through 103D shown in chain single-dotted lines onthe surface of the printed wiring board 100D, respectively.

On the edge of the printed wiring board 100D of the third embodiment, asin the printed wiring board 100, there are again provided a lot of outerelectrode pads 105 which are to be soldered to the main printed wiringboard 1 shown in FIG. 26. On the other hand, a lot of flip chip bondingpads 131 are provided in the areas 101D through 103D on the surface ofthe printed wiring board 100D.

These pads 131 and the outer electrode pads 105 are interconnected via acircuit pattern 109 provided on the surface of a printed wiring board100D, printed resistor elements 133, printed dielectric 134, throughholes 111 and interstitial via holes 112 formed in the printed wiringboard 100D.

As in the first embodiment, in the fourth embodiment, the circuitpattern 109 on the surface of the printed wiring board 100D and innerlayer conductors are interconnected via interstitial via holes 112.Therefore, the quantity of the circuit pattern 109 which has to bedisposed on the surface of the printed wiring board 100D is reduced.Further, in the fourth embodiment, the printed resistor elements 133 andthe printed dielectric 134 are provided right under the bare IC chips201D through 203D to be flip chip bonded, that is, on the areas 101Dthrough 103D, respectively.

By doing this, chip resistor elements and chip capacitors which had tobe conventionally provided around the IC chips can be reduced in number.Thus, the size of the multi-chip module can be reduced. Additionally,after forming the printed resistor elements 133 and the printeddielectrics 134 on the printed wiring board 100D, a solder resistpattern 115 is formed on the surface of the printed wiring board 100Dexcluding the parts for the flip chip bonding pads 131 and the outerelectrode pads 105.

Printed resistor elements 136 and printed dielectrics 137 permittingtrimming for adjustment is provided outside the areas 101D through 103Don the surface of the printed wiring board 100D. Specifically in a highfrequency circuit dealing with a high frequency, printed resistorelements and printed capacitors may have to be finely adjusted in orderto set the tuning frequency for a predetermined center frequency ormatch the characteristic frequency. Since such a fine adjustment is notpossible if the printed resistor elements or the printed dielectrics areformed in inner layers or under the bare IC chips, printed resistorelements 136 and printed dielectrics 137 permitting trimming foradjustment is provided on the surface of the printed wiring board 100D.

The bare IC chips 201D through 203D are bonded to the pads 131 of thearea 101D through 103D on the printed wiring board 100D by means of flipchip bonding to form a multi-chip module 5D. Since there is no need forproviding bonding pads around the bare IC chips in case of flip chipbonding, the size of multi-chip module can be made smaller than in caseof wire bonding.

As in case of the first embodiment, after putting the multi-chip module5D to a functional test by using the outer electrode pads 105, only thesuccessfully tested multi-chip modules 5D are mounted on the mainprinted wiring board 1 as shown in FIG. 26.

In the surface mounting of the multi-chip module 5D, the outer electrodepads 105 formed on the edge of the printed wiring board 100D aresoldered to the main printed wiring board 1. Therefore, this means thatspace equivalent to only the areas of the printed wiring boards 100D hasto be secured on the main printed wiring board 1 as the area necessaryfor mounting the multi-chip modules as in case of the first embodiment.

Printed conductors constituting inductance may be formed together withprinted resistor elements and printed dielectrics (capacitors) in thethird or fourth embodiment. By doing this, it is possible to form anoscillator and tuning circuit for processing a high frequency signal.

It should be noted that though each outer electrode pad 105 has ageometry in which cutting a through hole longitudinally into halvesresults in the first illustrative embodiment, through holes 106athemselves may be provided along the edge of the printed wiring board100, and these through holes may be used as outer electrode pads. Inthis case, if the peripheries of the printed wiring board 100 maycontact any metal member, a short circuit between any of the outerelectrode pads and the metal member can be avoided. This arrangement isalso applicable to the second through fourth embodiments.

Instead of outer electrode pads 105 with a geometry in which cutting athrough hole longitudinally into halves results, there may be providedpatterns 106b in each of which the land of the outer electrode pad isextended to the end and across the end surface of the printed wiringboard 100 as shown in FIG. 27, and each pattern 106b may be connected tothe main printed wiring board 1, which also simplifies the mountingprocess.

Though in the first embodiment a multi-chip module is disposed inparallel to the main printed wiring board 1 as shown in FIG. 9, themulti-chip module may be disposed for connection in perpendicular to themain printed wiring board 1 as shown in FIG. 28. Alternatively, themulti-chip module may be disposed between and in perpendicular to twoother printed wiring boards 1 disposed in parallel to each other. Thus,the degree of freedom in the disposition of multi-chip module isenhanced.

Also, a multi-chip module 5A is put on the main printed wiring board 1in the first embodiment, while a hole or a concavity M being provided inthe main printed wiring board 1, a multi-chip module may be inserted inthe hole or the concavity M. In this case, the thickness of the mainprinted wiring board can be reduced. Similarly, holes or concavity beingprovided in the printed wiring board, the bare IC chips may be insertedin the holes or the concavities. This arrangement is also applicable tothe second through fourth embodiments. In this case, the thickness ofthe main printed wiring board can be reduced.

Though in the first embodiment the electrode pads 205 of the bare ICchips 201 through 203 and the lead pads 107 of the printed wiring boardare interconnected via wires 208 by means of wire bonding, some of theelectrode pads 205 of the bare IC chips 201 through 203 may be directlyconnected to outer electrode pads 105 via wires 208 without providingthe corresponding lead pads 107 depending on the electrical arrangement.Doing this also contributes to the simplification of printed wiringboard 100. This may be applied to the third and the fourth embodiments.

If a flexible wiring board F is used for the main printed wiring board 1as shown in FIG. 30, multi-chip modules can be disposed in threedimensions. Furthermore, a multi-chip module may be covered with a coverSa of conductive material (metal or conductive resin) to shield themulti-chip module electromagnetically as shown in FIG. 31.Alternatively, the multi-chip modules may be covered with a cover Sb ofconductive material (metal or conductive resin) to electromagneticallyshield the multi-chip modules as a whole as shown in FIG. 32.

Though the present invention has been described in terms of someillustrative embodiments, it is apparent to those of ordinary skill inthe art that other various arrangements may be constructed withoutdeparting from the spirit and scope of the present invention. It shouldbe therefore understood that the present invention is not limited to thespecific embodiments described in the specification, but rather beconstrued broadly within its spirit and scope as defined by elements setout in the appended claims.

As described above, in a multi-chip module according to any of the 1st,5th, 7th, 9th, 11th, 12th, 16th, 22nd, 23rd and 28th aspects of theinvention, the geometry of each outer electrode pad which cutting athrough hole in the longitudinal direction yields for soldering themulti-chip module to the main printed wiring board, outer electrode padseach comprising a through hole provided on the margin, outer electrodepads extending from the margin and across the end face, or the directconnection between the bare IC chips and the outer electrode pads bymeans of wire bonding eliminates the need of providing the margin of theprinted wiring board with lead terminals as is done in conventionalmulti-chip modules. Therefore, the packaging density of electroniccomponents in the main printed wiring board is raised, and the workingprocess can be reduced.

In a multi-chip module according to any of the 2nd, 5th, 7th, 9th, 11th,12th and 16th aspects of the invention, a circuit pattern is disposed inareas on the printed wiring board where bare IC chips are mounted,resulting in a reduction of the circuit pattern which is to be providedaround the bare IC chips. The size of printed wiring board can bereduced accordingly.

In a multi-chip module according to any of the 3rd, 5th, 7th, 9th, 11th,12th and 16th aspects of the invention, the circuit pattern which is tobe provided around the bare IC chips is reduced because there is no needfor providing the lead terminals as in the multi-chip modules of the 1stor 2nd aspect of the invention.

In a multi-chip module according to any of the 4th, 5th, 7th, 9th, 11th,12th, 16th and 29th aspects of the invention, there is no need forproviding chip resistor elements, chip capacitors or inductors aroundthe bare IC chips because resistor elements, capacitors and inductorscan be formed on the areas, on the printed wiring board, where the bareIC chips are mounted. Therefore, the invention has the effect of reducethe size of printed wiring board accordingly.

In a multi-chip module according to any of the 6th, 7th, 9th, 11th,12th, 16th and 35th aspects of the invention, the bare IC chips areelectrically interconnected via interstitial via holes and innerconductor layers provided within a multilayer structure formed ofceramic material, glass epoxy material, and/or resin material.Therefore, the circuit pattern which has to be provided around the bareIC chips is reduced, and the printed wiring board can be nimiaturizedaccordingly.

In a multi-chip module according to any of the 8th, 9th and 16th aspectsof the invention, since resistor elements can be formed within theprinted wiring board, there is no need for providing chip resistorelements on the surface of the printed wiring board, which can beminiaturized accordingly.

In a multi-chip module according to any of the 10th, 11th and 16thaspects of the invention, since capacitors can be formed within theprinted wiring board, there is no need for providing chip capacitors onthe surface of the printed wiring board, which can be miniaturizedaccordingly.

In a multi-chip module according to any of the 12th, 13th and 16thaspects of the invention, since resistor elements, capacitors, andinductors are formed within the printed wiring board, there is no needfor providing chip resistor elements, chip capacitors, and inductors onthe surface of the printed wiring board, which can be miniaturizedaccordingly.

In a multi-chip module according to any of the 14th, 16th and 29thaspects of the invention, there is provided printed resistor elements,printed dielectrics and printed inductors, which has effects of not onlyany of the 1st through 13th aspects of the invention but also permittinga fine adjustment of operational characteristics of the circuit byremoving a part of the printed resistor elements, the printeddielectrics and the printed inductors. For example, this has the effectof facilitating and ensuring the adjustment for matching thecharacteristic in high frequency operation to a predeterminedcharacteristic.

In a multi-chip module according to any of the 15th, 16th and 25thaspects of the invention, since a single dam frame encloses a pluralityof bare IC chips, there is no need for providing each bare IC chip witha dam frame, which not only reduces the area occupied by the dam frames,but also facilitates and ensures the process of carrying the multi-chipmodule by absorbing the top face enclosed by the dam frame.

A multi-chip module according to the 17th aspect of the invention hasnot only the effect of 15th or 16th aspect of the invention but also theeffect of reducing a strain caused by heat at the time of resin sealingand reflow soldering because the dam frame is provided with areinforcing part. Thus, operations are facilitated.

Since in a multi-chip module according to the 18th aspect of theinvention the dam frame is mounted on the printed wiring board beingpositioned on the basis of the boundary between the electrode pads andthe surrounding area, there is no need for providing the printed wiringboard with holes in which the dam frames are mounted, as in case of the15th through 17th aspects of the invention. This raises the degree offreedom in the arrangement of circuit pattern, and accordinglycontributes to the miniaturization of printed wiring board.

In a multi-chip module according to the 19th aspect of the invention,the boundary between the electrode pads (e.g., golden color) and solderresist (e.g., green) provided adjacently to the electrode pads forpreventing the solder from bridging electrode pads is used as areference position for dam frame mounting. The color difference makesthe boundary more clear, insuring the identification of the boundary byan optical identification device, and resulting in an enhancement of theworking efficiency.

In a multi-chip module according to the 20th aspect of the invention,since the surface of the resin filling the dam frame enclosing aplurality of bare IC chips is not higher than the dam frame, the areaenclosed by the dam frame can be easily absorbed by a vacuum absorber,resulting in an enhancement of the working efficiency.

In a multi-chip module according to the 21st aspect of the invention,since the bare IC chips are mounted on the printed wiring board by meansof flip chip bonding, there is no need for disposing bonding pads aroundthe bare IC chips on the surface of the printed wiring board, which canbe miniaturized accordingly.

In a multi-chip module according to the 24th aspect of the invention,the degree of freedom in the arrangement of multi-chip module is raisedin that the multi-chip module may be disposed in parallel orperpendicular to the main printed wiring board.

In a multi-chip module according to the 25th aspect of the invention,after mounting the bare IC chips within the dam frame and sealing thebare IC chips by filling the dam frame with resin, other bare IC chipsare disposed on the dam frame and the resin. Accordingly, a largernumber of bare IC chips can be disposed on the multi-chip module, whichenables free and more complicated arrangement of a circuit.

In a multi-chip module according to the 26th or 27th aspect of theinvention, the bare IC chips are disposed in holes or concavities of themain printed wiring board and connected to the board by means of wirebonding, or the multi-chip module is inserted in a hole of the mainprinted wiring board. Therefore, the total thickness is kept thin.

In a multi-chip module according to the 30th aspect of the invention,the multi-chip module is disposed on a flexible wiring board, whichenables the three-dimensional disposition of multi-chip modules.

In a multi-chip module according to the 31th or 32th aspect of theinvention, the sealing is achieved with a metal dam frame andheat-conductive resin, and accordingly the heat radiation from the bareIC chips is ensured, resulting in a stable operation.

In a multi-chip module according to the 33th or 34th aspect of theinvention, the bare IC chips or the multi-chip module are covered with aconductive cover preventing electrodes from being short-circuited, andare shielded from electromagnetic field, resulting in a stableoperation.

Industrial Applicability

As described above, a multi-chip module of the invention isminiaturized, can be easily and surely mounted on a printed wiring boardin an electronic machine, yields stable operation, and is accordinglyvary useful for mounting on printed wiring boards in an electronicmachine.

What is claimed is:
 1. A multi-chip module which comprises a printedwiring board and a plurality of bare IC chips mounted on a predeterminedarea of the printed wiring board, the multi-chip module being mounted ona main printed wiring board, wherein:the printed wiring board has amultilayer structure including a plurality of inner layers; and themulti-chip module further comprises:a first resistor element both endsof which are electrically connected to a conductive pattern provided onone of the inner layers; and a second printed resistor element printedon an area other than the predetermined area of the printed wiring boardfor adjusting a characteristic of the resistors provided in themulti-chip module including the first resistor element.
 2. A multi-chipmodule which comprises a printed wiring board and a plurality of bare ICchips mounted on a predetermined area of the printed wiring board, themulti-chip module being mounted on a main printed wiring board,wherein:the printed wiring board has a multilayer structure including aplurality of inner layers; and the multi-chip module further comprises:afirst dielectric element both sides of which are electrically connectedto a conductive pattern provided on one of the inner layers so that aformed capacitor is formed by the dielectric element and the conductivepattern; and a second dielectric element printed on an area other thanthe predetermined area of the printed wiring board for adjusting acharacteristic of the capacitors provided in the multi-chip moduleincluding the formed capacitor.
 3. A multi-chip module which comprises aprinted wiring board and a plurality of bare IC chips mounted on apredetermined area of the printed wiring board, the multi-chip modulebeing mounted on a main printed wiring board, wherein:the printed wiringboard has a multilayer structure including a plurality of inner layers;and the multi-chip module further comprises:a first resistor elementboth ends of which are electrically connected to a conductive patternprovided on one of the inner layers; a first dielectric element bothsides of which are electrically connected to a conductive patternprovided on one of the inner layers so that a formed capacitor is formedby the dielectric element and the conductive pattern; a second printedresistor element printed on an area other than the predetermined area ofthe printed wiring board for adjusting a characteristic of the resistorsprovided in the multi-chip module including the first resistor element,and a second dielectric element printed on an area other than thepredetermined area of the printed wiring board for adjusting acharacteristic of the capacitors provided in the multi-chip moduleincluding the formed capacitor.